This distributed design enables the user to:

• Virtually eliminate contention among nodes for improved 
    application response time
• Provide optimal power to each functional area of an
   application
• Independently develop each node’s function
• Incrementally enhance the performance of each node
• Easily expand a system with the addition of new nodes for new application functions

Description

MULTISel configurations with various hosts allow hardware and software support for up to nine nodes forming a single system.

High-density packaging and internal cabling enable two connected MIJLTISe1 cabinets with up to eight nodes to provide up to 24 MWhets of distributed power in a space only three feet, eight inches wide. The controlling host node can be a CONCEPT 32/97, 32/87. Se1PAC ‘ or another MULTISel, depending on application requirements. With a CONCEPT 32/97 or 32/87. The system-level processing range increases to 34 MWhets.

The MULTISel Host/Node Peripheral Cabinet differs from the standard node cabinet in that it is designed to accommodate peripheral devices in the upper half Each node supports standard CONCEPT/32 hardware and software and runs its own copy of the MPX-32 Operating System, which is downloaded from the host node, Nodes are available in eight- and 16-SelBUS slot versions

MULTISel nodes contain:

• Vertically cooled, eight- or 16- lot Se1BUS chassis with power supply 
          (16-slot nodes include two power supplies)
• Power sequencing module
• CMOS CPU
• Floating-point Coprocessor
• Multi-Function Processor (MFP)
• 2MB or 8MB Dual-Port Integrated Memory Module (DPIMM)
• Reflective Memory port

Each of these components is implemented on a single circuit board. MULTISel nodes also can contain an Internal Processing Unit (IPU) a secondary computational processor — with its own Floating-point Coprocessor.

The single-board CMOS CPU uses the latest in advanced gate array technology to perform at levels equivalent to the CONCEPT 32/67 CPU while maintaining complete hardware compatibility.

Floating-point Coprocessor

Surface mourn chips and FAST-logic technology enable Gould to produce a single-board, floating-point accelerator that can be used as a coprocessor with the CMOS CPU and IPU. The Floating-point Coprocessor performs floating-point arithmetic operations and fixed-point multiplication in a fraction of the time required by firmware and software implementations. Both 32-bit single precision and 64-bit double precision operands are supported.

Multi-Function Processor

Several SelBUS and Multipurpose Bus boards are consolidated on the Multi-Function Processor (MFP) board. This board encompasses the following functions:

• Console port Seven asynchronous ports
• Line printer port
• Real-time clock and interval timer
• 12 external interrupts
• Two Small Computer Systems Interface (SCSI) buses — one dedicated to a fixed disk 
     drive the other for a magnetic tape drive and future devices

The MFP supports these functions without an expansion chassis. As an option, a second device interface card supports two 5 1/4inch floppy disk drives and is capable of generating an MP Bus

Dual-Port Integrated Memory Modules (DPIMMs) provide 2MB or 8MB of memory, DPIMMs feature two-way, on-board interleaving, which alleviates memory busy problems and improves memory access times in various applications. The second port of the DPIMM supports Reflective Memory DPIMMs can provide 16MB of memory and use only two Slots

With Reflective Memory, Nodes retain their own private memory while taking advantage of a common, logically linked reflective memory partition This partition contains data required by all nodes in the system, in effect providing each with its own copy of the data base. Any node writing to this partition causes that write to be immediately transferred to other nodes reflective memory partitions. Thus, each node has free access to its own constantly- updated copy of the application data base

Reflective Memory relies on the following components

• DPIMMs
• Reflective Memory Port: Read Sense Controller (RSC) and Write Sense Controller (WSC)           device interface card sets — Reflective Memory Bus (RMB)

The RSC monitors the RMB and the WSC monitors the SelBUS for addresses soft-programmed to specify the reflective portion of memory The RSC and WSC contain buffers for queuing requests to or from the RMB. which eliminates additional processing time The RMB is a high-speed bus that transfers data at the SelBUS rate of 26.67MB/second

Reflective Memory System

Software is an optional. MPX-32-based package consisting of six application tasks which provide the necessary tools to configure, download control, and monitor up to eight nodes from a single host

Model Numbers